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From devnull@lkml.org Wed Apr 24 18:13:11 2024 Envelope-to: j@jasper.es Delivery-date: Tue, 16 Jul 2013 19:52:03 +0200 Received: from localhost ([127.0.0.1] helo=squeeze.vs19.net) by squeeze.vs19.net with esmtp (Exim 4.80) (envelope-from ) id 1Uz9Pt-0000r5-Fz for j@jasper.es; Tue, 16 Jul 2013 19:52:02 +0200 Original-Recipient: rfc822;jasper@telfort.nl Received: from pop3.telfort.nl [213.75.3.52] by squeeze.vs19.net with POP3 (fetchmail-6.3.18) for (single-drop); Tue, 16 Jul 2013 19:52:01 +0200 (CEST) Received: from cpxmta-msg08.kpnxchange.com (10.94.114.29) by cpxmbs-msg01.support.local (8.6.060.20) id 51B06D95008BBEA2 for jasper@telfort.nl; Tue, 16 Jul 2013 19:36:10 +0200 Received: from cpsmtpb-ews02.kpnxchange.com (213.75.39.5) by cpxmta-msg08.kpnxchange.com (8.6.060.14) id 51AE91EC0483D245 for jasper@telfort.nl; Tue, 16 Jul 2013 19:36:10 +0200 Received: from cpsps-ews18.kpnxchange.com ([10.94.84.184]) by cpsmtpb-ews02.kpnxchange.com with Microsoft SMTPSVC(7.5.7601.17514); Tue, 16 Jul 2013 19:36:10 +0200 Received: from vger.kernel.org ([209.132.180.67]) by cpsps-ews18.kpnxchange.com with Microsoft SMTPSVC(7.5.7601.17514); Tue, 16 Jul 2013 19:36:09 +0200 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933719Ab3GPRgA (ORCPT ); Tue, 16 Jul 2013 13:36:00 -0400 Received: from mail-qe0-f45.google.com ([209.85.128.45]:62812 "EHLO mail-qe0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933664Ab3GPRfI (ORCPT ); Tue, 16 Jul 2013 13:35:08 -0400 Received: by mail-qe0-f45.google.com with SMTP id w7so562672qeb.18 for ; Tue, 16 Jul 2013 10:35:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=MNHM4zhzC+vn3jvlvUClccAieEM7IuYesM12AG+F1mE=; b=fPM2dJbRH77+jF5EbnvJWaKVSW X-Received: by 10.49.86.168 with SMTP id q8mr3594806qez.32.1373996107590; Tue, 16 Jul 2013 10:35:07 -0700 (PDT) Received: from anchor.com (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPSA id 11sm3144910qek.1.2013.07.16.10.35.05 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue From: Richard Henderson To: linux-kernel@vger.kernel.org Cc: ink@jurassic.park.msu.ru, mattst88@gmail.com, linux-alpha@vger.kernel.org Subject: [RFC PATCH 08/10] alpha: Always enable the rpcc clocksource for single processor Date: Tue, 16 Jul 2013 10:34:16 -0700 Message-Id: <1373996058-13399-9-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1373996058-13399-1-git-send-email-rth@twiddle.net> References: <1373996058-13399-1-git-send-email-rth@twiddle.net> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-Id: X-Mailing-List: linux-kernel@vger.kernel.org X-OriginalArrivalTime: 16 Jul 2013 17:36:09.0793 (UTC) FILETIME=[F57A0B10:01CE824A] X-RcptDomain: telfort.nl Don't depend on SMP, just check the number of processors online. This allows a single distribution kernel to use the clocksource when run on a single processor machine. Signed-off-by: Richard Henderson --- arch/alpha/kernel/time.c | 58 +++++++++++++++++++++++------------------------- 1 file changed, 28 insertions(+), 30 deletions(-) diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c index dbd56ec..cadb82b 100644 --- a/arch/alpha/kernel/time.c +++ b/arch/alpha/kernel/time.c @@ -186,6 +186,31 @@ common_init_rtc(void) init_rtc_irq(); } + +/* + * The RPCC as a clocksource primitive. + * + * While we have free-running timecounters running on all CPUs, and we make + * a half-hearted attempt in init_rtc_rpcc_info to sync the timecounter + * with the wall clock, that initialization isn't kept up-to-date across + * different time counters in SMP mode. Therefore we can only use this + * method when there's only one CPU enabled. + */ + +static cycle_t read_rpcc(struct clocksource *cs) +{ + return rpcc(); +} + +static struct clocksource clocksource_rpcc = { + .name = "rpcc", + .rating = 300, + .read = read_rpcc, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS +}; + + /* Validate a computed cycle counter result against the known bounds for the given processor core. There's too much brokenness in the way of timing hardware for any one method to work everywhere. :-( @@ -296,33 +321,6 @@ rpcc_after_update_in_progress(void) return rpcc(); } -#ifndef CONFIG_SMP -/* Until and unless we figure out how to get cpu cycle counters - in sync and keep them there, we can't use the rpcc. */ -static cycle_t read_rpcc(struct clocksource *cs) -{ - cycle_t ret = (cycle_t)rpcc(); - return ret; -} - -static struct clocksource clocksource_rpcc = { - .name = "rpcc", - .rating = 300, - .read = read_rpcc, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS -}; - -static inline void register_rpcc_clocksource(long cycle_freq) -{ - clocksource_register_hz(&clocksource_rpcc, cycle_freq); -} -#else /* !CONFIG_SMP */ -static inline void register_rpcc_clocksource(long cycle_freq) -{ -} -#endif /* !CONFIG_SMP */ - void __init time_init(void) { @@ -364,20 +362,20 @@ time_init(void) "and unable to estimate a proper value!\n"); } + if (hwrpb->nr_processors == 1) + clocksource_register_hz(&clocksource_rpcc, cycle_freq); + /* From John Bowman : allow the values to settle, as the Update-In-Progress bit going low isn't good enough on some hardware. 2ms is our guess; we haven't found bogomips yet, but this is close on a 500Mhz box. */ __delay(1000000); - if (HZ > (1<<16)) { extern void __you_loose (void); __you_loose(); } - register_rpcc_clocksource(cycle_freq); - state.last_time = cc1; state.scaled_ticks_per_cycle = ((unsigned long) HZ << FIX_SHIFT) / cycle_freq; -- 1.8.1.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/