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SubjectRe: [PATCH] i2c-omap: always send stop after nack

On Tue, Jul 16, 2013 at 05:33:47PM +0800, Hein Tibosch wrote:
> On 7/16/2013 5:03 PM, Felipe Balbi wrote:
> > Hi,
> >
> > On Tue, Jul 16, 2013 at 04:19:35PM +0800, Hein Tibosch wrote:
> >> Hi Vikram,
> >>
> >> On a OMAP4460, i2c-bus-3:
> >>
> >> A driver (lm75) is causing many 'timeout waiting for bus ready' errors.
> >> SDA remains high (as it should), but SCL remains low after a NACK.
> >> The bus becomes _unusable for other clients_.
> >>
> >> While probing, "lm75" writes a command, followed by a read + stop,
> >> but the write command is NACK'd. The chip does accept other writes/reads,
> >> it just refuses to ack invalid commands.
> >>
> >> Can you tell me if the patch below would make any sense? Or is it the
> >> responsibility of the client to reset the i2c_smbus?
> > patch below breaks repeated start.
> Hi,
> No, after the NACK, no more commands are being processed,
> including a repeated start. omap_i2c_xfer() returns -EREMOTEIO
> without ever freeing the bus.
> The bus is left in an impossible state with SCL constantly low
> and all next commands (to different chips) will therefore get
> With this patch, the bus will become idle again and new commands
> can be processed normally

but you mentioned that if you have IGNORE_NAK set, everything is fine,
since lm75 will get a return value of 0 and things will work just fine,
right ?

Also, you also said that the chip 'refuses to ack invalid commands', why
are you sending invalid commands to start with ? This could be a bug in
i2c-omap.c, sure, but let's try to figure out why IGNORE_NAK helps and
why is lm75 driver sending invalid commands.

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