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SubjectRe: [PATCH V6 22/30] thermal: exynos: Add support to access common register for multistance
On 17-06-2013 02:46, Amit Daniel Kachhap wrote:
> This patch adds support to parse one more common set of TMU register. First
> set of register belongs to each instance of TMU and second set belongs to
> common TMU registers.
>
> Acked-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
> Acked-by: Kukjin Kim <kgene.kim@samsung.com>
> Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>

This patch is fine:

Acked-by: Eduardo Valentin <eduardo.valentin@ti.com>

But please read my concern on next patch.

> ---
> .../devicetree/bindings/thermal/exynos-thermal.txt | 6 +++++-
> drivers/thermal/samsung/exynos_tmu.c | 20 ++++++++++++++++++++
> 2 files changed, 25 insertions(+), 1 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> index 535fd0e..0ea33f7 100644
> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> @@ -7,7 +7,11 @@
> "samsung,exynos4210-tmu"
> "samsung,exynos5250-tmu"
> - interrupt-parent : The phandle for the interrupt controller
> -- reg : Address range of the thermal registers
> +- reg : Address range of the thermal registers. For soc's which has multiple
> + instances of TMU and some registers are shared across all TMU's like
> + interrupt related then 2 set of register has to supplied. First set
> + belongs to each instance of TMU and second set belongs to common TMU
> + registers.
> - interrupts : Should contain interrupt for thermal system
> - clocks : The main clock for TMU device
> - clock-names : Thermal system clock name
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index 877dab8..150a869 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -40,6 +40,7 @@
> * @id: identifier of the one instance of the TMU controller.
> * @pdata: pointer to the tmu platform/configuration data
> * @base: base address of the single instance of the TMU controller.
> + * @base_common: base address of the common registers of the TMU controller.
> * @irq: irq number of the TMU controller.
> * @soc: id of the SOC type.
> * @irq_work: pointer to the irq work structure.
> @@ -53,6 +54,7 @@ struct exynos_tmu_data {
> int id;
> struct exynos_tmu_platform_data *pdata;
> void __iomem *base;
> + void __iomem *base_common;
> int irq;
> enum soc_type soc;
> struct work_struct irq_work;
> @@ -478,6 +480,24 @@ static int exynos_map_dt_data(struct platform_device *pdev)
> return -ENODEV;
> }
> data->pdata = pdata;
> + /*
> + * Check if the TMU shares some registers and then try to map the
> + * memory of common registers.
> + */
> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
> + return 0;
> +
> + if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
> + dev_err(&pdev->dev, "failed to get Resource 1\n");
> + return -ENODEV;
> + }
> +
> + data->base_common = devm_ioremap(&pdev->dev, res.start,
> + resource_size(&res));
> + if (!data->base) {
> + dev_err(&pdev->dev, "Failed to ioremap memory\n");
> + return -ENOMEM;
> + }
>
> return 0;
> }
>


--
You have got to be excited about what you are doing. (L. Lamport)

Eduardo Valentin

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