Messages in this thread | | | Date | Tue, 18 Jun 2013 11:11:18 +0200 | From | Peter Zijlstra <> | Subject | Re: [PATCH] perf,x86: Fix shared registers mutual exclusion bug |
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On Wed, Jun 05, 2013 at 04:43:46PM +0200, Stephane Eranian wrote: > > This patch fixes a problem with the shared registers mutual > exclusion code and incremental event scheduling by the > generic perf_event code. > > There was a bug whereby the mutual exclusion on the shared > registers was not enforced because of incremental scheduling > abort due to event constraints. > > Example on Nehalem: > group1= ref-cycles,OFFCORE_RESPONSE_0:PF_RFO > group2= ref-cycles > > The ref-cycles event can only be measured by 1 counter. Yet, there > are 2 instances here. The first group can be scheduled and is committed. > Then, the generic code tries to schedule group2 and this fails (because > there is no more counter to support the 2nd instance of ref-cycles). > > But in x86_schedule_events() error path, put_event_contraints() is invoked > on ALL the events and not just the ones that just failed. That causes the > "lock" on the shared offcore_response MSR to be released. Yet the first group > is actually scheduled and is exposed to reprogramming of that shared msr by > the sibling HT thread (when they are shared by HT threads). In other words, > there is no guarantee on what is measured for the offcore_response event. > > This patch fixes the problem by tagging committed events with the > PERF_X86_EVENT_COMMITTED tag. In the error path of x86_schedule_events(), > only the events NOT tagged have their constraint released. The tag > is eventually removed when the event in descheduled. > > Example was given with offcore_response but also applies to LBR_SELECT > and LDLAT shared registers. > > Signed-off-by: Stephane Eranian <eranian@google.com>
I'm getting conflicts against other patches -- most notably I think the contraints stack opt from Andrew Hunter.
I'll try and get Ingo to finally pick up my queued patches so we can rebase.
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