Messages in this thread Patch in this message | | | From | Peter Hurley <> | Subject | [PATCH] firewire: Enable physical DMA above 4GB | Date | Tue, 26 Mar 2013 10:22:14 -0400 |
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Quadlet reads to memory above 4GB is painfully slow when serviced by the AR DMA context. In addition, the CPU(s) may be locked-up, preventing any transfer at all.
Write the PhyUpperBound register with the end-of-memory value. If end-of-memory is beyond the OHCI limit of 0x0000ffff00000000, clamp to that value.
Signed-off-by: Peter Hurley <peter@hurleysoftware.com> --- drivers/firewire/ohci.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c index 044ace3..b4135a5 100644 --- a/drivers/firewire/ohci.c +++ b/drivers/firewire/ohci.c @@ -2249,6 +2249,7 @@ static int ohci_enable(struct fw_card *card, struct pci_dev *dev = to_pci_dev(card->device); u32 lps, version, irqs; int i, ret; + u32 phys_upper; if (software_reset(ohci)) { dev_err(card->device, "failed to reset ohci card\n"); @@ -2323,7 +2324,10 @@ static int ohci_enable(struct fw_card *card, reg_write(ohci, OHCI1394_FairnessControl, 0); card->priority_budget_implemented = ohci->pri_req_max != 0; - reg_write(ohci, OHCI1394_PhyUpperBound, 0x00010000); + phys_upper = min(0xffff0000ULL, + (dma_get_required_mask(card->device) >> 16) + 1); + reg_write(ohci, OHCI1394_PhyUpperBound, max(phys_upper, 0x00010000U)); + reg_write(ohci, OHCI1394_IntEventClear, ~0); reg_write(ohci, OHCI1394_IntMaskClear, ~0); -- 1.8.1.2
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