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SubjectRe: [PATCH] drivers/block/xsysace - replace in(out)_8/in(out)_be16/in(out)_le16 with generic iowrite(read)8/16(be)
2013/2/5 Benjamin Herrenschmidt <>:
> On Tue, 2013-02-05 at 11:54 +0100, Michal Simek wrote:
>> xilinx ppc is big endian
>> xilinx arm is little endian
>> xilinx microblaze is little endian and big endian
> You are talking about the core, why should the xsysace block driver be
> synthesized with the same endianness as the core ? That's not terribly
> useful, especially since reverse load/stores on ppc are essentially
> free...

It is done by hardware guys and I can do nothing with it.

>> It is just sharing the same IP across all platforms. Which is better
>> than create new devices and new device drivers for it. It means that
>> all of them are register compatible but require access with native
>> platform endianness as I listed above.
> Every attempt at doing "native platform endianness" has always been a
> misguided attempt turning into a trainwreck (see OHCI USB).
> Just pick one endian for the device and stick to it.

It is reality and I can't change it. Arnd mentioned it earlier that USB

>> It is not a problem to create runtime wrapper and even detect endian
>> directly in the driver
>> but the point if this is the proper design.
>> Also ioread32 and ioread32be shouldn't be used on ARM because there
>> are missing memory barriers.
> Then fix them, they shouldn't be, it's a bug, it will break many other
> drivers. They should be fully equivalent to readl.

I want to be sure about this. I have parsed this again with closer look and
seems to me that ioread32 is equal to readl and iowrite32 to writel.
Arnd: Am I right?


Michal Simek, Ing. (M.Eng)
w: p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu -
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform

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