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    Subject[PATCH 3.2 058/149] ARM: PCI: versatile: Fix SMAP register offsets
    3.2.52-rc1 review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Peter Maydell <peter.maydell@linaro.org>

    commit 99f2b130370b904ca5300079243fdbcafa2c708b upstream.

    The SMAP register offsets in the versatile PCI controller code were
    all off by four. (This didn't have any observable bad effects
    because on this board PHYS_OFFSET is zero, and (a) writing zero to
    the flags register at offset 0x10 has no effect and (b) the reset
    value of the SMAP register is zero anyway, so failing to write SMAP2
    didn't matter.)

    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
    Signed-off-by: Kevin Hilman <khilman@linaro.org>
    Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
    ---
    arch/arm/mach-versatile/pci.c | 6 +++---
    1 file changed, 3 insertions(+), 3 deletions(-)

    --- a/arch/arm/mach-versatile/pci.c
    +++ b/arch/arm/mach-versatile/pci.c
    @@ -43,9 +43,9 @@
    #define PCI_IMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x0)
    #define PCI_IMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x4)
    #define PCI_IMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x8)
    -#define PCI_SMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x10)
    -#define PCI_SMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x14)
    -#define PCI_SMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x18)
    +#define PCI_SMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x14)
    +#define PCI_SMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x18)
    +#define PCI_SMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x1c)
    #define PCI_SELFID __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0xc)

    #define DEVICE_ID_OFFSET 0x00


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