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Subject[PATCH RFC 50/77] mlx5: Update MSI/MSI-X interrupts enablement code
Date
As result of recent re-design of the MSI/MSI-X interrupts enabling
pattern this driver has to be updated to use the new technique to
obtain a optimal number of MSI/MSI-X interrupts required.

Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
---
drivers/net/ethernet/mellanox/mlx5/core/main.c | 18 +++++++++---------
1 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c
index adf0e5d..5c21e50 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c
@@ -119,8 +119,13 @@ static int mlx5_enable_msix(struct mlx5_core_dev *dev)
int err;
int i;

+ err = pci_msix_table_size(dev->pdev);
+ if (err < 0)
+ return err;
+
nvec = dev->caps.num_ports * num_online_cpus() + MLX5_EQ_VEC_COMP_BASE;
nvec = min_t(int, nvec, num_eqs);
+ nvec = min_t(int, nvec, err);
if (nvec <= MLX5_EQ_VEC_COMP_BASE)
return -ENOSPC;

@@ -131,20 +136,15 @@ static int mlx5_enable_msix(struct mlx5_core_dev *dev)
for (i = 0; i < nvec; i++)
table->msix_arr[i].entry = i;

-retry:
- table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE;
err = pci_enable_msix(dev->pdev, table->msix_arr, nvec);
- if (err <= 0) {
+ if (err) {
+ kfree(table->msix_arr);
return err;
- } else if (err > MLX5_EQ_VEC_COMP_BASE) {
- nvec = err;
- goto retry;
}

- mlx5_core_dbg(dev, "received %d MSI vectors out of %d requested\n", err, nvec);
- kfree(table->msix_arr);
+ table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE;

- return -ENOSPC;
+ return 0;
}

static void mlx5_disable_msix(struct mlx5_core_dev *dev)
--
1.7.7.6


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