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SubjectRe: [RESEND PATCH v2 2/6] ARM: dts: Specify clocks for UARTs on bcm11351
On Wed, Oct 16, 2013 at 10:47:06PM +0100, Tim Kryger wrote:
> Rather than declaring the frequency of the external clock, specify the
> label of the clock such that the driver may determine the frequency on
> its own.

Nit: we're not specifying the label of the clock. Clocks are represented
py a phand+args pair, and the important part is that we're specifying
the clock itself.

How about something like:

---->8----
Currently the rate of the external clock input to "snps,dw-apb-uart"
devices is described by a clock-frequency property rather than by
reference to the clock itself.

This patch changes the "snps,dw-apb-uart" entries in bcm11351.dtsi to
refer to the parent clock directly, following the common clock bindings.
---->8----

Also, this should probably be moved after the driver change, so as to
not be unbootable temporarily.

Thanks,
Mark.

>
> Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
> Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
> Reviewed-by: Matt Porter <matt.porter@linaro.org>
> ---
> arch/arm/boot/dts/bcm11351.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
> index c6464fb..ce65367 100644
> --- a/arch/arm/boot/dts/bcm11351.dtsi
> +++ b/arch/arm/boot/dts/bcm11351.dtsi
> @@ -43,7 +43,7 @@
> compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
> status = "disabled";
> reg = <0x3e000000 0x1000>;
> - clock-frequency = <13000000>;
> + clocks = <&uartb_clk>;
> interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
> reg-shift = <2>;
> reg-io-width = <4>;
> @@ -53,7 +53,7 @@
> compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
> status = "disabled";
> reg = <0x3e001000 0x1000>;
> - clock-frequency = <13000000>;
> + clocks = <&uartb2_clk>;
> interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
> reg-shift = <2>;
> reg-io-width = <4>;
> @@ -63,7 +63,7 @@
> compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
> status = "disabled";
> reg = <0x3e002000 0x1000>;
> - clock-frequency = <13000000>;
> + clocks = <&uartb3_clk>;
> interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
> reg-shift = <2>;
> reg-io-width = <4>;
> @@ -73,7 +73,7 @@
> compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
> status = "disabled";
> reg = <0x3e003000 0x1000>;
> - clock-frequency = <13000000>;
> + clocks = <&uartb4_clk>;
> interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
> reg-shift = <2>;
> reg-io-width = <4>;
> --
> 1.8.0.1
>
>
>


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