Messages in this thread | | | Subject | Re: [RFC][PATCH] perf, intel: Expose SMI_COUNT as a fixed counter | From | Peter Zijlstra <> | Date | Fri, 14 Sep 2012 15:43:00 +0200 |
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On Wed, 2012-09-12 at 13:27 +0200, Peter Zijlstra wrote: > Subject: perf, intel: Expose SMI_COUNT as a fixed counter > From: Peter Zijlstra <a.p.zijlstra@chello.nl> > Date: Wed Sep 12 13:10:53 CEST 2012 > > The Intel SMI_COUNT sadly isn't a proper PMU event but a free-running > MSR, expose it by creating another fake fixed PMC and another pseudo > event.
OK, so it looks like this MSR has the same content on all CPUs.. is this inherent to SMIs or is that just my box being funny?
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