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SubjectRe: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back
On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
> This call-back points to the right function for initializing
> the msi_msg structure.

What is the 'hpet_id' purpose in this?

>
> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
> ---
> arch/x86/include/asm/io_apic.h | 4 +++
> arch/x86/include/asm/x86_init.h | 4 +++
> arch/x86/kernel/apic/io_apic.c | 59 ++++++++++++++++++++-------------------
> arch/x86/kernel/x86_init.c | 1 +
> drivers/iommu/irq_remapping.c | 9 ++++--
> 5 files changed, 46 insertions(+), 31 deletions(-)
>
> diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
> index 0db4429..59a3f4e 100644
> --- a/arch/x86/include/asm/io_apic.h
> +++ b/arch/x86/include/asm/io_apic.h
> @@ -160,6 +160,9 @@ extern void __init native_setup_timer_pin(unsigned int ioapic_idx,
> unsigned int pin, int vector);
> extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
>
> +extern void native_compose_msi_msg(struct pci_dev *pdev,
> + unsigned int irq, unsigned int dest,
> + struct msi_msg *msg, u8 hpet_id);
> int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr);
>
> extern int save_ioapic_entries(void);
> @@ -245,6 +248,7 @@ static inline void disable_ioapic_support(void) { }
> #define native_ioapic_set_affinity NULL
> #define native_setup_ioapic_entry NULL
> #define native_setup_timer_pin NULL
> +#define native_compose_msi_msg NULL
> #endif
>
> #endif /* _ASM_X86_IO_APIC_H */
> diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
> index ffe5860..1430af0 100644
> --- a/arch/x86/include/asm/x86_init.h
> +++ b/arch/x86/include/asm/x86_init.h
> @@ -180,9 +180,13 @@ struct x86_platform_ops {
> };
>
> struct pci_dev;
> +struct msi_msg;
>
> struct x86_msi_ops {
> int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
> + void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
> + unsigned int dest, struct msi_msg *msg,
> + u8 hpet_id);
> void (*teardown_msi_irq)(unsigned int irq);
> void (*teardown_msi_irqs)(struct pci_dev *dev);
> void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
> diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
> index c2f2d2d..aac3f62 100644
> --- a/arch/x86/kernel/apic/io_apic.c
> +++ b/arch/x86/kernel/apic/io_apic.c
> @@ -2989,37 +2989,16 @@ void destroy_irq(unsigned int irq)
> /*
> * MSI message composition
> */
> -#ifdef CONFIG_PCI_MSI
> -static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
> - struct msi_msg *msg, u8 hpet_id)
> +void native_compose_msi_msg(struct pci_dev *pdev,
> + unsigned int irq, unsigned int dest,
> + struct msi_msg *msg, u8 hpet_id)
> {
> - struct irq_cfg *cfg;
> - int err;
> - unsigned dest;
> -
> - if (disable_apic)
> - return -ENXIO;
> -
> - cfg = irq_cfg(irq);
> - err = assign_irq_vector(irq, cfg, apic->target_cpus());
> - if (err)
> - return err;
> -
> - err = apic->cpu_mask_to_apicid_and(cfg->domain,
> - apic->target_cpus(), &dest);
> - if (err)
> - return err;
> + struct irq_cfg *cfg = irq_cfg(irq);
>
> - if (irq_remapped(cfg)) {
> - compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
> - return err;
> - }
> + msg->address_hi = MSI_ADDR_BASE_HI;
>
> if (x2apic_enabled())
> - msg->address_hi = MSI_ADDR_BASE_HI |
> - MSI_ADDR_EXT_DEST_ID(dest);
> - else
> - msg->address_hi = MSI_ADDR_BASE_HI;
> + msg->address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
>
> msg->address_lo =
> MSI_ADDR_BASE_LO |
> @@ -3038,8 +3017,32 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
> MSI_DATA_DELIVERY_FIXED:
> MSI_DATA_DELIVERY_LOWPRI) |
> MSI_DATA_VECTOR(cfg->vector);
> +}
>
> - return err;
> +#ifdef CONFIG_PCI_MSI
> +static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
> + struct msi_msg *msg, u8 hpet_id)
> +{
> + struct irq_cfg *cfg;
> + int err;
> + unsigned dest;
> +
> + if (disable_apic)
> + return -ENXIO;
> +
> + cfg = irq_cfg(irq);
> + err = assign_irq_vector(irq, cfg, apic->target_cpus());
> + if (err)
> + return err;
> +
> + err = apic->cpu_mask_to_apicid_and(cfg->domain,
> + apic->target_cpus(), &dest);
> + if (err)
> + return err;
> +
> + x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id);
> +
> + return 0;
> }
>
> static int
> diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
> index eba02e5..af5874e 100644
> --- a/arch/x86/kernel/x86_init.c
> +++ b/arch/x86/kernel/x86_init.c
> @@ -115,6 +115,7 @@ struct x86_platform_ops x86_platform = {
> EXPORT_SYMBOL_GPL(x86_platform);
> struct x86_msi_ops x86_msi = {
> .setup_msi_irqs = native_setup_msi_irqs,
> + .compose_msi_msg = native_compose_msi_msg,
> .teardown_msi_irq = native_teardown_msi_irq,
> .teardown_msi_irqs = default_teardown_msi_irqs,
> .restore_msi_irqs = default_restore_msi_irqs,
> diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
> index d9cd920f..e61a174 100644
> --- a/drivers/iommu/irq_remapping.c
> +++ b/drivers/iommu/irq_remapping.c
> @@ -102,6 +102,7 @@ static void __init irq_remapping_modify_x86_ops(void)
> x86_io_apic_ops.setup_timer_pin = irq_remapping_setup_timer_pin;
> x86_msi.setup_msi_irqs = irq_remapping_setup_msi_irqs;
> x86_msi.setup_hpet_msi = setup_hpet_msi_remapped;
> + x86_msi.compose_msi_msg = compose_remapped_msi_msg;
> }
>
> static __init int setup_nointremap(char *str)
> @@ -242,10 +243,12 @@ void compose_remapped_msi_msg(struct pci_dev *pdev,
> unsigned int irq, unsigned int dest,
> struct msi_msg *msg, u8 hpet_id)
> {
> - if (!remap_ops || !remap_ops->compose_msi_msg)
> - return;
> + struct irq_cfg *cfg = irq_get_chip_data(irq);
>
> - remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
> + if (cfg && !irq_remapped(cfg))
> + native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
> + else if (remap_ops && remap_ops->compose_msi_msg)
> + remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
> }
>
> static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)
> --
> 1.7.9.5
>
>
> --
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