| From | Arnd Bergmann <> | Subject | Re: [PATCH v2 22/31] arm64: Floating point and SIMD | Date | Wed, 15 Aug 2012 14:35:30 +0000 |
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On Tuesday 14 August 2012, Catalin Marinas wrote: > This patch adds support for FP/ASIMD register bank saving and restoring > during context switch and FP exception handling to generate SIGFPE. > There are 32 128-bit registers and the context switching is currently > done non-lazily. Benchmarks on real hardware are required before > implementing lazy FP state saving/restoring. > > Signed-off-by: Will Deacon <will.deacon@arm.com> > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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