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SubjectRe: [PATCH 17/28] iommu/amd: Split device table initialization into irq and dma part
On Thu, Jul 05, 2012 at 02:36:37PM +0200, Joerg Roedel wrote:
> When the IOMMU is enabled very early (as with irq-remapping)
> some devices are still in BIOS hand. When dma is blocked
> early this can cause lots of IO_PAGE_FAULTs. So delay the
> DMA initialization and do it right before the dma_ops are
> initialized.
>
> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

Okay, I merged this patch with the previous one after another review.
This patch basically undoes and refactors what the previous patch did.
So it makes sense to do it all in one patch.

> ---
> drivers/iommu/amd_iommu_init.c | 22 ++++++++++++++++++----
> 1 file changed, 18 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
> index e663f1d..453f80a 100644
> --- a/drivers/iommu/amd_iommu_init.c
> +++ b/drivers/iommu/amd_iommu_init.c
> @@ -1383,19 +1383,27 @@ static int __init init_memory_definitions(struct acpi_table_header *table)
> * Init the device table to not allow DMA access for devices and
> * suppress all page faults
> */
> -static void init_device_table(void)
> +static void init_device_table_dma(void)
> {
> u32 devid;
>
> for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) {
> set_dev_entry_bit(devid, DEV_ENTRY_VALID);
> set_dev_entry_bit(devid, DEV_ENTRY_TRANSLATION);
> -
> - if (amd_iommu_irq_remap)
> - set_dev_entry_bit(devid, DEV_ENTRY_IRQ_TBL_EN);
> }
> }
>
> +static void init_device_table(void)
> +{
> + u32 devid;
> +
> + if (!amd_iommu_irq_remap)
> + return;
> +
> + for (devid = 0; devid <= amd_iommu_last_bdf; ++devid)
> + set_dev_entry_bit(devid, DEV_ENTRY_IRQ_TBL_EN);
> +}
> +
> static void iommu_init_flags(struct amd_iommu *iommu)
> {
> iommu->acpi_flags & IVHD_FLAG_HT_TUN_EN_MASK ?
> @@ -1783,8 +1791,14 @@ static bool detect_ivrs(void)
>
> static int amd_iommu_init_dma(void)
> {
> + struct amd_iommu *iommu;
> int ret;
>
> + init_device_table_dma();
> +
> + for_each_iommu(iommu)
> + iommu_flush_all_caches(iommu);
> +
> if (iommu_pass_through)
> ret = amd_iommu_init_passthrough();
> else
> --
> 1.7.9.5

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