Messages in this thread | | | Date | Wed, 6 Jun 2012 07:41:32 -0700 | From | Andi Kleen <> | Subject | Re: [PATCH 5/5] perf, x86: Prefer RDPMC over RDMSR for reading counters |
| |
On Wed, Jun 06, 2012 at 04:21:12PM +0200, Peter Zijlstra wrote: > On Wed, 2012-06-06 at 07:16 -0700, Andi Kleen wrote: > > On Wed, Jun 06, 2012 at 12:46:19PM +0200, Peter Zijlstra wrote: > > > On Tue, 2012-06-05 at 17:56 -0700, Andi Kleen wrote: > > > > From: Andi Kleen <ak@linux.intel.com> > > > > > > > > RDPMC is much faster than RDMSR for reading performance counters, > > > > since it's not serializing. Use it if possible in the perf handler. > > > > > > > > Only tested on Sandy Bridge, so I only enabled it there so far. > > > > > > That's just stupid.. I took Vince's patch from a while back. > > > > What do you mean? It's significantly faster to read the counters this > > way, because it avoids serialization and other overhead. > > What I'm saying is you only enabling it for snb and being too lazy to > test anything else. Nor do I think its worth the conditional, all chips > we have PMU support for have rdpmc instructions.
The reason I avoided it on everyone is that some old chips (NetBurst'ish I think) only were able to read the low 32bits through RDPMC.
If you prefer I can enable it on all the P6 cores? I cannot test them all however.
> > > Vince's patch only enabled it for user space I believe, This is for lowering > > the kernel PMI handler overhead. > > No, his patch did the kernel thing. Furthermore he actually tested it on > a bunch of machines.
Ok. I wasn't aware of that. But it's not merged, what happened to ti?
-Andi
-- ak@linux.intel.com -- Speaking for myself only
| |