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    SubjectRe: [PATCH 03/14 v3] Input: atmel_mxt_ts - refactor mxt_read/write_reg to take a length
    Hi Henrik,

    On Tue, Apr 24, 2012 at 01:23:19PM +0200, Henrik Rydberg wrote:
    > Hi Daniel,
    >
    > > The i2c bus requires 5 bytes to do a 1 byte read (1-byte i2c address + 2
    > > byte offset + 1-byte i2c address + 1 byte data), or 4 bytes to do a
    > > 1-byte write (1 byte i2c address + 2 byte offset + 1 byte data).
    > >
    > > By taking a length with reads and writes, the driver can amortize
    > > transaction overhead by performing larger transactions where appropriate.
    > >
    > > This patch just sets up the new API. Later patches refactor reads/writes
    > > to take advantage of the larger transactions.
    > >
    > > These functions are also now return any errors reported by the i2c layer.
    > >
    > > Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
    > > ---
    >
    > In the cyttsp a dedicate tx buffer is used, which is a bit easier on
    > the eyes.

    Cyttsp needs a cacheline aligned buffer because it can be wired over
    SPI, that is why it has a dedicate buffer.

    --
    Dmitry


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