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    Subject[PATCH 2/8] MIPS: BMIPS: delay irq enable to ->smp_finish()
    Date
    From: Yong Zhang <yong.zhang@windriver.com>

    To prepare for smoothing set_cpu_[active|online]() mess up

    Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
    Cc: Ralf Baechle <ralf@linux-mips.org>
    ---
    arch/mips/kernel/smp-bmips.c | 14 +++++++-------
    1 files changed, 7 insertions(+), 7 deletions(-)

    diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
    index 3046e29..298b437 100644
    --- a/arch/mips/kernel/smp-bmips.c
    +++ b/arch/mips/kernel/smp-bmips.c
    @@ -197,13 +197,6 @@ static void bmips_init_secondary(void)

    write_c0_brcm_action(ACTION_CLR_IPI(smp_processor_id(), 0));
    #endif
    -
    - /* make sure there won't be a timer interrupt for a little while */
    - write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);
    -
    - irq_enable_hazard();
    - set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ1 | IE_IRQ5 | ST0_IE);
    - irq_enable_hazard();
    }

    /*
    @@ -212,6 +205,13 @@ static void bmips_init_secondary(void)
    static void bmips_smp_finish(void)
    {
    pr_info("SMP: CPU%d is running\n", smp_processor_id());
    +
    + /* make sure there won't be a timer interrupt for a little while */
    + write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);
    +
    + irq_enable_hazard();
    + set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ1 | IE_IRQ5 | ST0_IE);
    + irq_enable_hazard();
    }

    /*
    --
    1.7.1


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