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SubjectRe: [PATCH 58/76] idle, x86: Allow off-lined CPU to enter deeper C states
On 04/02/12 13:25, Tony Luck wrote:
>>> + while (1) {
>>> +
>>> + if (cx->entry_method == ACPI_CSTATE_HALT)
>>> + halt();
>
> What's the intent here? I think that I can just set up a function pointer
> named "halt" on ia64 and point it to my cpu_halt() function (which looks
> for the deepest C-state, and then calls PAL to enter it. Is that equivalent
> to what the x86 "halt()" function does?


x86 halt() causes processor to go to C1 state (which is often not the
deepest). But other than that it seems similar to what you are describing.

However, the fix that you are proposing will only help ia64 and I wonder
whether others architectures may have the same problem?

(And I don't think inb/inl should cause you any trouble since they are
already used, for example, in acpi_idle_do_entry())

-boris




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