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SubjectRe: [Intel-gfx] [PATCH] drm/i915: clear fencing tracking state when retiring request
On Thu, 12 Apr 2012 01:27:57 +0200, Daniel Vetter <> wrote:
> This fixes a regression introduce in

> commit 7dd4906586274f3945f2aeaaa5a33b451c3b4bba
> Author: Chris Wilson <>
> Date: Wed Mar 21 10:48:18 2012 +0000
> drm/i915: Mark untiled BLT commands as fenced on gen2/3
> which fixed fencing tracking for untiled blt commands.
> A side effect of that patch was that now also untiled objects have a
> non-zero obj->last_fenced_seqno to track when a fence can be set up
> after a pipelined tiling change. Unfortunately this was only cleared
> by the fence setup and teardown code, resulting in tons of untiled but
> inactive objects with non-zero last_fenced_seqno.
> Now after resume we completely reset the seqno tracking, both on the
> driver side (by setting dev_priv->next_seqno = 1) and on the hw side
> (by allocating a new hws page, which contains the seqnos). Hilarity
> and indefinite waits ensued from the stale seqnos in
> obj->last_fenced_seqno from before the suspend.
> The fix is to properly clear the fencing tracking state like we
> already do for the normal gpu rendering while moving objects off the
> active list.
> Reported-and-tested-by: "Rafael J. Wysocki" <>
> Cc: Jiri Slaby <>
> Signed-Off-by: Daniel Vetter <>

I spent sometime discussing whether or not we could hit a similar bug
with a well placed change of tiling after resume, and the outcome is
that as the fences are reset during freeze then all tiled objects that
had been used for rendering would have been flushed (and their
last_fenced_seqno set to 0).

So this is a new regression caused by the aforementioned patch and this
is the cleanest fix,
Reviewed-by: Chris Wilson <>

Chris Wilson, Intel Open Source Technology Centre

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