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    Subject[ 09/68] ARM: LPC32xx: Fix irq on GPI_28
    3.0-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Roland Stigge <stigge@antcom.de>

    commit f6737055c1c432a9628a9a731f9881ad8e0a9eee upstream.

    The GPI_28 IRQ was not registered properly. The registration of
    IRQ_LPC32XX_GPI_28 was added and the (wrong) IRQ_LPC32XX_GPI_11 at
    LPC32XX_SIC1_IRQ(4) was replaced by IRQ_LPC32XX_GPI_28 (see manual of
    LPC32xx / interrupt controller).

    Signed-off-by: Roland Stigge <stigge@antcom.de>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/arm/mach-lpc32xx/include/mach/irqs.h | 2 +-
    arch/arm/mach-lpc32xx/irq.c | 4 ++++
    2 files changed, 5 insertions(+), 1 deletion(-)

    --- a/arch/arm/mach-lpc32xx/include/mach/irqs.h
    +++ b/arch/arm/mach-lpc32xx/include/mach/irqs.h
    @@ -61,7 +61,7 @@
    */
    #define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
    #define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
    -#define IRQ_LPC32XX_GPI_11 LPC32XX_SIC1_IRQ(4)
    +#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
    #define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
    #define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
    #define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)
    --- a/arch/arm/mach-lpc32xx/irq.c
    +++ b/arch/arm/mach-lpc32xx/irq.c
    @@ -118,6 +118,10 @@ static const struct lpc32xx_event_info l
    .event_group = &lpc32xx_event_pin_regs,
    .mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
    },
    + [IRQ_LPC32XX_GPI_28] = {
    + .event_group = &lpc32xx_event_pin_regs,
    + .mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
    + },
    [IRQ_LPC32XX_GPIO_00] = {
    .event_group = &lpc32xx_event_int_regs,
    .mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,



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