Messages in this thread Patch in this message | | | Date | Fri, 09 Mar 2012 11:03:10 -0800 | From | Greg KH <> | Subject | [ 68/95] ARM: 7355/1: perf: clear overflow flag when disabling counter on ARMv7 PMU |
| |
3.2-stable review patch. If anyone has any objections, please let me know.
------------------
From: Will Deacon <will.deacon@arm.com>
commit 99c1745b9c76910e195889044f914b4898b7c9a5 upstream.
When disabling a counter on an ARMv7 PMU, we should also clear the overflow flag in case an overflow occurred whilst stopping the counter. This prevents a spurious overflow being picked up later and leading to either false accounting or a NULL dereference.
Reported-by: Ming Lei <tom.leiming@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- arch/arm/kernel/perf_event_v7.c | 5 +++++ 1 file changed, 5 insertions(+)
--- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c @@ -878,6 +878,11 @@ static inline int armv7_pmnc_disable_int counter = ARMV7_IDX_TO_COUNTER(idx); asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter))); + isb(); + /* Clear the overflow flag in case an interrupt is pending. */ + asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter))); + isb(); + return idx; }
| |