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SubjectRe: [PATCH] Clear previous interrupts after fifo is disabled
On Fri, Mar 09, 2012 at 05:34:03PM +0100, Linus Walleij wrote:
> On Thu, Mar 8, 2012 at 7:49 PM, Greg Kroah-Hartman
> <gregkh@linuxfoundation.org> wrote:
> > On Mon, Feb 27, 2012 at 06:30:20PM +0900, Chanho Min wrote:
> >> This is another workaroud of  'https://lkml.org/lkml/2012/1/17/104'
> >> with additional analysis.Bootloader can transfer control to kernel and
> >> there are some pending interrupts. In this case, RXFE of the flag
> >> register is set by clearing FEN(LCRH) even if rx data remains in the
> >> fifo. It seems that the fifo's status is initiailized. Interrupt
> >> handler can not get any data from data register because of the below
> >> break condtion.
> >>
> >> pl011_fifo_to_tty
> >>  while (max_count--) {
> >>    if (status & UART01x_FR_RXFE)
> >>       break;
> >
> > This patch never seemed to be agreed on, so I'm not taking it.
> >
> > Can someone, if this is still needed, and everyone agrees on how to
> > solve it, please send me the needed fix?
>
> To me it seems Russell's patch solves part of the problem,
> and Jong-Sung Kim's patch on top of that solves the entire
> problem, but Chanho need to come back and tell whether
> this is the case in practice.

Ok, then, once it is tested, can someone resend them to me?

thanks,

greg k-h
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