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    Subject[ 121/149] gpio/davinci: fix enabling unbanked GPIO IRQs
    3.2-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Sekhar Nori <nsekhar@ti.com>

    commit 81b279d80a63628e580c71a31d30a8c3b3047ad4 upstream.

    Unbanked GPIO IRQ handling code made a copy of just
    the irq_chip structure for GPIO IRQ lines which caused
    problems after the generic IRQ chip conversion because
    there was no valid irq_chip_type structure with the
    right "regs" populated. irq_gc_mask_set_bit() was
    therefore accessing random addresses.

    Fix it by making a copy of irq_chip_type structure
    instead. This will ensure sane register offsets.

    Reported-by: Jon Povey <Jon.Povey@racelogic.co.uk>
    Tested-by: Jon Povey <Jon.Povey@racelogic.co.uk>
    Signed-off-by: Sekhar Nori <nsekhar@ti.com>
    Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/gpio/gpio-davinci.c | 11 ++++++-----
    1 file changed, 6 insertions(+), 5 deletions(-)

    --- a/drivers/gpio/gpio-davinci.c
    +++ b/drivers/gpio/gpio-davinci.c
    @@ -386,7 +386,7 @@ static int __init davinci_gpio_irq_setup
    * IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs.
    */
    if (soc_info->gpio_unbanked) {
    - static struct irq_chip gpio_irqchip_unbanked;
    + static struct irq_chip_type gpio_unbanked;

    /* pass "bank 0" GPIO IRQs to AINTC */
    chips[0].chip.to_irq = gpio_to_irq_unbanked;
    @@ -394,9 +394,10 @@ static int __init davinci_gpio_irq_setup

    /* AINTC handles mask/unmask; GPIO handles triggering */
    irq = bank_irq;
    - gpio_irqchip_unbanked = *irq_get_chip(irq);
    - gpio_irqchip_unbanked.name = "GPIO-AINTC";
    - gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked;
    + gpio_unbanked = *container_of(irq_get_chip(irq),
    + struct irq_chip_type, chip);
    + gpio_unbanked.chip.name = "GPIO-AINTC";
    + gpio_unbanked.chip.irq_set_type = gpio_irq_type_unbanked;

    /* default trigger: both edges */
    g = gpio2regs(0);
    @@ -405,7 +406,7 @@ static int __init davinci_gpio_irq_setup

    /* set the direct IRQs up to use that irqchip */
    for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) {
    - irq_set_chip(irq, &gpio_irqchip_unbanked);
    + irq_set_chip(irq, &gpio_unbanked.chip);
    irq_set_handler_data(irq, &chips[gpio / 32]);
    irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH);
    }



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