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SubjectRe: [PATCH] ep93xx: Implement double buffering for M2M DMA channels
On Thu, Mar 22, 2012 at 01:52:52PM -0500, H Hartley Sweeten wrote:

> I hacked this back to the handle_one_vic function. It looks like every time
> I get the message above the stat read in that function shows an active
> interrupt for DMAM2M0 (the dma rx channel) and DMAM2M1 (the dma
> tx channel). Because of the way handle_one_vic processes the irq's, the
> DMAM2M0 interrupt gets handled first. When it's done it must be clearing
> the DMAM2M1 interrupt automatically for some reason. So, when it's
> handled there is no interrupt pending so we get the message.
> The "cleanest" fix I can think of is the following patch. This is against
> linux-next.

I can't figure out any better fix unless we move ep93xx back to use
!MULTI_IRQ_HANDLER which obviously is not good thing to do.

> From: H Hartley Sweeten <>
> dma: ep93xx: check for spurious interrupts
> The ep93xx dma controller generates spurious interrupts on dma1chan1 when
> used with the mmc_spi driver. Catch these early by making sure there is an
> interrupt to actually process.
> Signed-off-by: H Hartley Sweeten <>

Tested-by: Mika Westerberg <>

Thanks for investigating this. You missed one thing though, see below.
Otherwise it doesn't compile :)

diff --git a/drivers/dma/ep93xx_dma.c b/drivers/dma/ep93xx_dma.c
index e1cc87a..614bff4 100644
--- a/drivers/dma/ep93xx_dma.c
+++ b/drivers/dma/ep93xx_dma.c
@@ -751,7 +751,7 @@ static irqreturn_t ep93xx_dma_interrupt(int irq, void *dev_id)
return IRQ_NONE;

- switch (edmac->edma->hw_interrupt(edmac)) {
+ switch (edmac->edma->hw_interrupt(edmac, irq_status)) {
desc->complete = true;

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