[lkml]   [2012]   [Feb]   [27]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
Subject[Regression] powerpc/usb: fix issue of CPU halt when missing USB PHY clock

The patch that checks the CTRL_PHY_CLK_VALID bit is failing incorrectly on my system (P4080DS). If I revert it, my system goes back to working correctly, but as is, it fails and wont allow my USB to work properly.

I've tried adding a loop to poll this bit 10,000 times with a udelay(1) on each loop and it still fails, so it doesn't appear to be a timing issue.

Is this check valid for all systems?

SwissDisk :
Ubuntu :
My Blog :

 \ /
  Last update: 2012-02-27 17:13    [W:0.030 / U:4.584 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site