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    SubjectRe: [PATCH] processor passthru - upload _Cx and _Pxx data to hypervisor (v5).
    >>> On 23.02.12 at 23:31, Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> wrote:
    > This module (processor-passthru) collects the information that the cpufreq
    > drivers and the ACPI processor code save in the 'struct acpi_processor' and
    > then uploads it to the hypervisor.

    Thus looks conceptually wrong to me - there shouldn't be a need for a
    CPUFreq driver to be loaded in Dom0 (or your module should masquerade
    as the one and only suitable one).

    > On the hypervisor side, it requires this patch on AMD:
    > # HG changeset patch
    > # Parent aea8cfac8cf1afe397f2e1d422a852008d8a83fe
    > traps: AMD PM RDMSRs (MSR_K8_PSTATE_CTRL, etc)
    >
    > The restriction to read and write the AMD power management MSRs is gated if
    > the
    > domain 0 is the PM domain (so FREQCTL_dom0_kernel is set). But we can
    > relax this restriction and allow the privileged domain to read the MSRs
    > (but not write). This allows the priviliged domain to harvest the power
    > management information (ACPI _PSS states) and send it to the hypervisor.

    Why would accessing these MSRs be necessary here, when it isn't
    for non-pvops? Perhaps only because you want a CPUFreq driver
    loaded?

    Jan

    > This patch works fine with older classic dom0 (2.6.32) and with
    > AMD K7 and K8 boxes.
    >
    > Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
    > diff -r aea8cfac8cf1 xen/arch/x86/traps.c
    > --- a/xen/arch/x86/traps.c Thu Feb 23 13:23:02 2012 -0500
    > +++ b/xen/arch/x86/traps.c Thu Feb 23 13:29:00 2012 -0500
    > @@ -2484,7 +2484,7 @@ static int emulate_privileged_op(struct
    > case MSR_K8_PSTATE7:
    > if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD )
    > goto fail;
    > - if ( !is_cpufreq_controller(v->domain) )
    > + if ( !is_cpufreq_controller(v->domain) && !IS_PRIV(v->domain) )
    > {
    > regs->eax = regs->edx = 0;
    > break;





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