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SubjectRe: [PATCH 4/9] PCI: Fix cardbus bridge resources as optional size handling
On Tue, 7 Feb 2012 22:11:22 -0800
Yinghai Lu <yinghai@kernel.org> wrote:

> On Tue, Feb 7, 2012 at 9:01 PM, Ram Pai <linuxram@us.ibm.com> wrote:
> >
> > ..snip..
> >>        * If we have prefetchable memory support, allocate
> >>        * two regions.  Otherwise, allocate one region of
> >>        * twice the size.
> >>        */
> >>       if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
> >>               b_res[2].start = pci_cardbus_mem_size;
> >>               b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1;
> >>               b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH |
> >>                                 IORESOURCE_STARTALIGN;
> >>               if (realloc_head) {
> >>                       b_res[2].end -= pci_cardbus_mem_size;
> >>                       add_to_list(realloc_head, bridge, b_res+2,
> >>                                pci_cardbus_mem_size, pci_cardbus_mem_size);
> >>               }
> >>
> >>               /* reduce that to half */
> >>               b_res_3_size = pci_cardbus_mem_size;
> >>       }
> >
> > ACK. Ok. got it. This looks correct.
>
> Good, So we have
>
> Acked-by: Ram Pai <linuxram@us.ibm.com>
> Tested-by: Dominik Brodowski <linux@dominikbrodowski.net>
>
> Hope Jesse will not miss to add them

Yeah looks fine. I'd like to see an ack from Dominik on 5/9 as well
though. Can you include the acks and tested-bys when you re-post 3-9
with bug references and any other comments included?

Thanks,
--
Jesse Barnes, Intel Open Source Technology Center
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