Messages in this thread | | | Date | Fri, 14 Dec 2012 14:58:14 -0700 | From | Jason Gunthorpe <> | Subject | Re: [PATCH] of: Support a PCI device that is compatible with 'simple-bus' |
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On Fri, Dec 14, 2012 at 08:26:29PM +0000, Grant Likely wrote:
> > > If the soc_devices are getting triggered on that and they shouldn't be, > > > then we need a mechanism in the soc_bridge node to kick out of that > > > behavoir for its children. > > > > Is this what you were thinking? > > Not really. I see what you're trying to do, but doing it this way forces > all children of PCI nodes to use the PCI addressing space. Others have > had simple children of PCI devices and didn't use the PCI address layout > at all. Those users would break with this approach.
Yes, that's right.
If you drop 'device_type=pci' from the PCI device (keep it on the host bridge), then you can setup a ranges down to a smaller width and things seem to work OK. That must be what other users are doing.
However, you can't stay at address-cells=3 for the children. That doesn't work.
So, if you have separate PCI regions, like MMIO and prefetch it looks like this works OK:
pci_device@0 { ranges = // MMIO region, BAR 0 <0x20000000 0x00000000 0x02000000 0x00000000 0x00000000 0x0 0x8000000 // Prefetch region, BAR 1 0x40000000 0x00000000 0x42000000 0x00000000 0x00000000 0x0 0x8000000>;
#size-cells = <1>; #address-cells = <2>; sub { // MMIO region at BAR 0 offset 0x2000 reg = <0x20000000 0x00002000 0x1000>; } sub2 { // Prefetch region at BAR 1 offset 0x4000 reg = <0x40000000 0x00004000 0x1000>; } }
Which is weird, but OK..
This is good enough for my application.. fixing up address-cells=3 to work generally seems pretty complicated at first blush?
> However, if you want to pass a unity mapping from the PCI device to the > a child of it, it should be sufficient to use an empty 'ranges;' > property in the PCI device node instead of listing out the ranges that > you want to translate.
It isn't a unity mapping - the children see address 0 as being the start of a BAR. The DTS has three levels of translation:
- platform device child - 0 is the start of a BAR in the pci device - pci device - 0 is the start of the host bridge memory window for the BAR's type - pci controller - 0 is the start of physical memory
Thanks, Jason
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