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Subject[49/67] sparc64: Fix masking and shifting in VIS fpcmp emulation.
3.0-stable review patch.  If anyone has any objections, please let me know.

------------------

From: "David S. Miller" <davem@davemloft.net>

[ Upstream commit 2e8ecdc008a16b9a6c4b9628bb64d0d1c05f9f92 ]

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
---
arch/sparc/kernel/visemul.c | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)
--- a/arch/sparc/kernel/visemul.c
+++ b/arch/sparc/kernel/visemul.c
@@ -713,17 +713,17 @@ static void pcmp(struct pt_regs *regs, u
s16 b = (rs2 >> (i * 16)) & 0xffff;

if (a > b)
- rd_val |= 1 << i;
+ rd_val |= 8 >> i;
}
break;

case FCMPGT32_OPF:
for (i = 0; i < 2; i++) {
- s32 a = (rs1 >> (i * 32)) & 0xffff;
- s32 b = (rs2 >> (i * 32)) & 0xffff;
+ s32 a = (rs1 >> (i * 32)) & 0xffffffff;
+ s32 b = (rs2 >> (i * 32)) & 0xffffffff;

if (a > b)
- rd_val |= 1 << i;
+ rd_val |= 2 >> i;
}
break;

@@ -733,17 +733,17 @@ static void pcmp(struct pt_regs *regs, u
s16 b = (rs2 >> (i * 16)) & 0xffff;

if (a <= b)
- rd_val |= 1 << i;
+ rd_val |= 8 >> i;
}
break;

case FCMPLE32_OPF:
for (i = 0; i < 2; i++) {
- s32 a = (rs1 >> (i * 32)) & 0xffff;
- s32 b = (rs2 >> (i * 32)) & 0xffff;
+ s32 a = (rs1 >> (i * 32)) & 0xffffffff;
+ s32 b = (rs2 >> (i * 32)) & 0xffffffff;

if (a <= b)
- rd_val |= 1 << i;
+ rd_val |= 2 >> i;
}
break;

@@ -753,17 +753,17 @@ static void pcmp(struct pt_regs *regs, u
s16 b = (rs2 >> (i * 16)) & 0xffff;

if (a != b)
- rd_val |= 1 << i;
+ rd_val |= 8 >> i;
}
break;

case FCMPNE32_OPF:
for (i = 0; i < 2; i++) {
- s32 a = (rs1 >> (i * 32)) & 0xffff;
- s32 b = (rs2 >> (i * 32)) & 0xffff;
+ s32 a = (rs1 >> (i * 32)) & 0xffffffff;
+ s32 b = (rs2 >> (i * 32)) & 0xffffffff;

if (a != b)
- rd_val |= 1 << i;
+ rd_val |= 2 >> i;
}
break;

@@ -773,17 +773,17 @@ static void pcmp(struct pt_regs *regs, u
s16 b = (rs2 >> (i * 16)) & 0xffff;

if (a == b)
- rd_val |= 1 << i;
+ rd_val |= 8 >> i;
}
break;

case FCMPEQ32_OPF:
for (i = 0; i < 2; i++) {
- s32 a = (rs1 >> (i * 32)) & 0xffff;
- s32 b = (rs2 >> (i * 32)) & 0xffff;
+ s32 a = (rs1 >> (i * 32)) & 0xffffffff;
+ s32 b = (rs2 >> (i * 32)) & 0xffffffff;

if (a == b)
- rd_val |= 1 << i;
+ rd_val |= 2 >> i;
}
break;
}



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