Messages in this thread | | | Date | Wed, 25 Jan 2012 10:31:32 +0000 | From | Marc Zyngier <> | Subject | Re: [PATCH v3 0/6] ARM: Remove the __ARCH_WANT_INTERRUPTS_ON_CTXSW definition |
| |
On 24/01/12 15:14, Will Deacon wrote: > On Mon, Jan 23, 2012 at 09:53:38AM +0000, Catalin Marinas wrote: >> On Mon, Jan 23, 2012 at 09:47:59AM +0000, Russell King - ARM Linux wrote: >>> On Mon, Jan 23, 2012 at 09:26:24AM +0000, Catalin Marinas wrote: >>>> On Mon, Jan 23, 2012 at 09:15:31AM +0000, Peter Zijlstra wrote: >>>>> On Fri, 2012-01-20 at 17:42 +0000, Catalin Marinas wrote: >>>>>> This is version 3 of the set of patches removing >>>>>> __ARCH_WANT_INTERRUPTS_ON_CTXSW on ARM. The series was rebased on top of >>>>>> 3.3-rc1 and fixed the conflicts with the kernel/sched/ changes and the >>>>>> ARM LPAE patches. There are no functional changes from v2. I plan to >>>>>> push this to -next and get it ready for 3.4-rc1. >>>>>> >>>>>> Question for Peter/Ingo - how do we merge the first patch that >>>>>> introduces finish_arch_post_lock_switch? Do you pick it up or I can >>>>>> merge it via rmk (with your ack)? >>>>> >>>>> I'm fine either way, I'll probably ask Ingo to pull your tree so that I >>>>> can stack some other patches on top. >>>> >>>> In which case I would need Russell's acked-by. >>> >>> That depends on knowing what CPU architectures this has been tested on, >>> and whether anyone external has tested it. It's definitely a change >>> which needs some tested-by tags on it. >> >> I agree. On my side, I tested it on: >> >> Versatile Express + Cortex-A9 (SMP configuration, ASIDs) >> Versatile PB926 (UP configuration, no ASIDs) > > For what it's worth, I've also tested this on: > > Realview PB1176 (UP, ASIDs) > Cortex-A5 (SMP, ASIDs) > Cortex-A7 (SMP, ASIDs) > > and I haven't seen any problems with native, parallel kernel builds. I don't > have anything prior to ARMv5 available, but at least we seem to have covered > v5-v7.
Probably redundant with the above, but nonetheless tested on: Realview PB11MP (SMP, ASIDs) Realview PBA8 (UP, ASIDs) Panda OMAP4 (SMP, ASIDs)
using parallel kernel builds.
M. -- Jazz is not dead. It just smells funny...
| |