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SubjectEmulating unsupported x86 opcodes in software

I'm looking for advice regarding the emulation of CPU instructions
which the current processor doesn't support. Specifically, I want to
emulate SSE3 instructions on non-SSE3-capable CPUs. The OSx86
project[1] has developed an SSE3 emulation based on SSE2 instructions.

The general idea is:
- install a "stage 1" trap handler for INT 6h (invalid opcode)
- "stage 1" handler returns the address of the "stage 2" handler, the
actual emulation routine
- "stage 2" handler runs in user-mode, reads the invalid (SSE3)
instruction and operands and emulates it
- "stage 2" handler stores the result in the correct destination
(register or memory) and restores all dirty registers to their
original state
More in-depth description is available as PDF[2].

Now it is not a problem to replace the INT 6h handler, but these are
my open questions:
1. How can I have the stage 2 handler run in user-mode (ring 3)
2. How do I allocate/obtain the address of the code segment containing
the stage 2 handler OR
3. Is it even possible to for code which is implemented in the kernel
to be called and executed in user-mode, and if not, what is the

Both stage 1 and 2 handlers are available as binary (currently, I'm
trying to contact the original author for the source code).

Thank you very much for any help.

Stefan Seidel
P.S.: CC'ing me in your answer would be appreciated.


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