[lkml]   [2011]   [Sep]   [28]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
    SubjectRe: [PATCH v3 00/24] C6X: New architecture
    On Tue, 27 Sep 2011 16:29:41 EDT, Mark Salter said:

    > This architecture supports members of the Texas Instruments family
    > of C6x single and multicore DSPs. The multicore DSPs do not support
    > cache coherancy, so are not suitable for SMP.

    Is there a usage model for the multicore? I know somebody had some patches for
    "HPC dedicated compute cores" that would just basically run a userspace process
    and that's it - would those be applicable here?

    [unhandled content-type:application/pgp-signature]
     \ /
      Last update: 2011-09-28 23:51    [W:0.019 / U:2.788 seconds]
    ©2003-2017 Jasper Spaans. hosted at Digital OceanAdvertise on this site