lkml.org 
[lkml]   [2011]   [Sep]   [22]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRe: [V3][PATCH 4/7] perf, x86: Implement IBS interrupt handler
Date
Robert Richter <robert.richter@amd.com> writes:
>
> +static int perf_ibs_handle_irq(struct perf_ibs *perf_ibs, struct pt_regs *iregs)
> +{
> + struct perf_event *event = NULL;
> + struct hw_perf_event *hwc = &event->hw;
> + struct perf_sample_data data;
> + struct perf_raw_record raw;
> + struct pt_regs regs;
> + struct perf_ibs_data ibs_data;
> + int offset, size;
> + unsigned int msr;
> + u64 *buf;
> +
> + msr = hwc->config_base;
> + buf = ibs_data.regs;
> + rdmsrl(msr, *buf);
> + if (!(*buf++ & perf_ibs->valid_mask))
> + return 0;

No check if the NMI is really caused by IBS? Very nasty.
This will not interoperate well with other NMIs.

-Andi

--
ak@linux.intel.com -- Speaking for myself only


\
 
 \ /
  Last update: 2011-09-22 23:53    [W:0.136 / U:14.648 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site