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SubjectRE: [PATCH 3/7] i2c-eg20t: delete 10bit access processing
The device is BCM20791.  Please contact Aaron Smith ( for evaluation.  

By the way, the existing handling of 10-bit address in the patch you intended to delete does not work. You'll need to fix that before you can test with the device successfully.

For the write operation, it's a easy fix:

@@ -410,25 +408,16 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,

if (msgs->flags & I2C_M_TEN) {
- addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7);
+ addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7) & 0x06;

For the read operation, static s32 pch_i2c_readbytes(), you'll need to do a write followed by a restart and a read... please refer to the i2c spec...



-----Original Message-----
From: Tomoya MORINAGA []
Sent: Wednesday, September 21, 2011 8:14 PM
To: Jeffrey (Sheng-Hui) Chu
Cc: Jean Delvare; Ben Dooks;;; Qi Wang;;;;
Subject: Re: [PATCH 3/7] i2c-eg20t: delete 10bit access processing

(2011/09/22 0:42), Jeffrey (Sheng-Hui) Chu wrote:

> There is i2c device coming out that uses 10-bit address.
Thank you for your information.
We want to test 10-bit mode using the device.
So let me know the device information ?

Anyway, Now, kernel i2c-core is EXPERIMENTAL stage for 10-bit mode like below.

WARNING! The current 10 bit address support is EXPERIMENTAL. There
are several places in the code that will cause SEVERE PROBLEMS with
10 bit addresses, even though there is some basic handling and
hooks. Also,
almost no supported adapter handles the 10 bit addresses correctly.

As soon as a real 10 bit address device is spotted 'in the wild', we
can and will add proper support. Right now, 10 bit address devices
are defined by the I2C protocol, but we have never seen a single
device which supports them.

After kernel supports 10bit-mode formally, we will add the function to i2c-eg20t again.


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