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    Subject[PATCH 2/5] mce: mask out undefined bits from MCi_ADDR
    Date
    From: Tony Luck <tony.luck@intel.com>

    Move duplicate copies of the code that reads ADDR/MISC registers
    to a function. Add masking code for systems that have undefined
    low-order bits in the MCi_ADDR register.

    Based on original code by Andi Kleen

    Signed-off-by: Tony Luck <tony.luck@intel.com>
    ---

    Andi originally posted this as two patches - one to move the common
    code to the new function "mce_read_aux()", the second to add the
    masking.
    Seto-san objected to the masking on the grounds that the bits might
    contain something useful - but after some thought, I agree with Andi
    that it is better to drop undefined bits.

    arch/x86/kernel/cpu/mcheck/mce.c | 31 +++++++++++++++++++++++--------
    1 files changed, 23 insertions(+), 8 deletions(-)

    diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
    index 91bb983..1ce64c3 100644
    --- a/arch/x86/kernel/cpu/mcheck/mce.c
    +++ b/arch/x86/kernel/cpu/mcheck/mce.c
    @@ -490,6 +490,27 @@ static void mce_report_event(struct pt_regs *regs)
    irq_work_queue(&__get_cpu_var(mce_irq_work));
    }

    +/*
    + * Read ADDR and MISC registers.
    + */
    +static void mce_read_aux(struct mce *m, int i)
    +{
    + if (m->status & MCI_STATUS_MISCV)
    + m->misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
    + if (m->status & MCI_STATUS_ADDRV) {
    + m->addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
    +
    + /*
    + * Mask the reported address by the reported granuality.
    + */
    + if (mce_ser && (m->status & MCI_STATUS_MISCV)) {
    + u8 shift = m->misc & 0x1f;
    + m->addr >>= shift;
    + m->addr <<= shift;
    + }
    + }
    +}
    +
    DEFINE_PER_CPU(unsigned, mce_poll_count);

    /*
    @@ -540,10 +561,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
    (m.status & (mce_ser ? MCI_STATUS_S : MCI_STATUS_UC)))
    continue;

    - if (m.status & MCI_STATUS_MISCV)
    - m.misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
    - if (m.status & MCI_STATUS_ADDRV)
    - m.addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
    + mce_read_aux(&m, i);

    if (!(flags & MCP_TIMESTAMP))
    m.tsc = 0;
    @@ -984,10 +1002,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
    if (severity == MCE_AR_SEVERITY)
    kill_it = 1;

    - if (m.status & MCI_STATUS_MISCV)
    - m.misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
    - if (m.status & MCI_STATUS_ADDRV)
    - m.addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
    + mce_read_aux(&m, i);

    /*
    * Action optional error. Queue address for later processing.
    --
    1.7.3.1


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