[lkml]   [2011]   [Jul]   [1]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [PATCH 0/4] perf: Intel uncore pmu counting support
On Fri, Jul 1, 2011 at 2:23 PM, Stephane Eranian <> wrote:
> Lin,
> Ok, false alarm. Vol3b is correct. I missed the fact that if you want
> wrmsrl() to write full width generic counters, you have to use the
> alternate MSR alias. I guess that's for backward compatibility.
> So for full width wrmsrl on PERFCTR0 -> use 0x41c
> uncore counter value: 0x678ffffeeee
> core fixed counter value: 0x678ffffeeee
>       core generic counter value: 0xffffffffeeee
> wide core generic counter value: 0x678ffffeeee
> I think full width write to fixed counters has been there
> for a long time. Looks like the problem was only present
> for core generic counters until SNB.
Forgot to say, that we could adapt the code to use the alternate
registers if full width wrmsrl() is supported. That would mitigate
a bit the overhead of sampling and counting by simply not interrupting
that often to accumulate counts in the SW counter.
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
More majordomo info at
Please read the FAQ at

 \ /
  Last update: 2011-07-01 14:31    [W:0.062 / U:2.780 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site