Messages in this thread | | | Subject | Re: [PATCH 0/4] perf: Intel uncore pmu counting support | From | Lin Ming <> | Date | Fri, 01 Jul 2011 11:17:10 +0800 |
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On Fri, 2011-07-01 at 00:27 +0800, Stephane Eranian wrote: > On Thu, Jun 30, 2011 at 2:10 PM, Stephane Eranian <eranian@google.com> wrote: > > On Thu, Jun 30, 2011 at 10:09 AM, Lin Ming <ming.m.lin@intel.com> wrote: > >> Hi, all > >> > >> I posted uncore patches months ago, but it was pended due to an uncore > >> interrupt problem. > >> > >> This series are cut to support uncore pmu counting only. > >> So uncore interrupt handling is not needed. > >> > > You're making the assumption that when counting, you can never construct > > a measurement that will cause a counter to overflow the 39 bits. If not, then > > you need interrupt handling even when counting. > > > The actual counter width is 48. But wrmsrl() can only write the bottom 32 bits > of a register. I think Intel fixed that only with SandyBridge (see Vol3b). Thus, > the risk of 'silent' wrap around is much higher now as you have only 31 bits > to play with.
I just tested wrmsrl on uncore counters and it's surprised to me that it supports full write.
val64.low = 0xFFFFEEEE; val64.high = 0x12345678;
On Nehalem/Westmere:
msr = 0x3b0; //NHM_MSR_UNCORE_PMC0 wrmsrl(msr, val64.full & 0xfffffffffff); //48 bits counter rdmsrl(msr, val64.full); printfk("counter value: 0x%llx\n", val64.full);
I got: counter value: 0x5678ffffeeee
On SandyBridge:
msr = 0x716; //SNB_MSR_UNC_CBO_1_PER_CTR0 wrmsrl(msr, val64.full & 0xfffffffffff); //44 bits counter rdmsrl(msr, val64.full); printfk("counter value: 0x%llx\n", val64.full);
I got: counter value: 0x678ffffeeee
> > But if I read your patch correctly, it seems you are avoiding wrmsrl() on the > counter. Instead, you are reading it when you start (prev_count) and using > that value to compute the delta on stop. > > Am I understanding your workaround correctly?
Yes, but I didn't realize that it's a workaround.
Lin Ming
> > > > > >> The uncore pmu type is allocated dynamically and exported via sysfs. > >> $ cat /sys/bus/event_source/devices/uncore/type > >> 6 > >> > >> You can count uncore raw events as below, > >> $ perf stat -e uncore:r0101 ls > >> > >> It reads uncore pmu type id from sysfs to setup perf_event_attr::type. > >> > >> Comments are appreciated. > >> > >> Thanks, > >> Lin Ming > >> > >> > >
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