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    Subject[PATCH 07/11] spi-dw: Set number of available chip selects correctly
    Date
    From: Dirk Brandewie <dirk.brandewie@gmail.com>

    Only four chip selects are available directly off the pins of the
    master.

    Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
    ---
    drivers/spi/spi-dw-mid.c | 4 +++-
    1 files changed, 3 insertions(+), 1 deletions(-)

    diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c
    index 78e64d3..1d11268 100644
    --- a/drivers/spi/spi-dw-mid.c
    +++ b/drivers/spi/spi-dw-mid.c
    @@ -211,7 +211,9 @@ int spi_dw_mid_init(struct spi_dw *dws)
    dws->max_freq = MRST_SPI_CLK_BASE / (clk_cdiv + 1);
    iounmap(clk_reg);

    - dws->num_cs = 16;
    + dws->num_cs = 4; /* spi_dw_chip_sel() bits 0-3 are
    + * valid in the slave enable register
    + */
    dws->fifo_len = 40; /* FIFO has 40 words buffer */

    #ifdef CONFIG_SPI_DW_MID_DMA
    --
    1.7.3.4


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