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Subject[PATCH 08/11] spi-dw: Ensure fifo lenght is set.
Date
From: Dirk Brandewie <dirk.brandewie@gmail.com>

Bug on fifo_len not being set. The fifo sizing routine does not work
since the txfltr register can not be written while the controller is
enabled. The max value of txfltr can be larger than the fifo. The
register allows values upto 0x3f (63) the fifo depth on the Intel
SOC's if 40

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
---
drivers/spi/spi-dw.c | 18 ++----------------
1 files changed, 2 insertions(+), 16 deletions(-)
diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
index ad92826..cc38aa0 100644
--- a/drivers/spi/spi-dw.c
+++ b/drivers/spi/spi-dw.c
@@ -776,25 +776,11 @@ static int destroy_queue(struct spi_dw *dws)
/* Restart the controller, disable all interrupts, clean rx fifo */
static void spi_dw_hw_init(struct spi_dw *dws)
{
+ BUG_ON(!dws->fifo_len);
+
spi_dw_disable(dws);
spi_dw_mask_intr(dws, 0xff);
spi_dw_enable(dws);
-
- /*
- * Try to detect the FIFO depth if not set by interface driver,
- * the depth could be from 2 to 256 from HW spec
- */
- if (!dws->fifo_len) {
- u32 fifo;
- for (fifo = 2; fifo <= 257; fifo++) {
- dw_writew(dws, txfltr, fifo);
- if (fifo != dw_readw(dws, txfltr))
- break;
- }
-
- dws->fifo_len = (fifo == 257) ? 0 : fifo;
- dw_writew(dws, txfltr, 0);
- }
}

int __devinit spi_dw_add_host(struct spi_dw *dws)
--
1.7.3.4


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