Messages in this thread | | | Date | Fri, 27 May 2011 15:39:09 +0100 | From | Mark Brown <> | Subject | Re: [PATCH 0/4] Add a generic struct clk |
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On Tue, May 24, 2011 at 12:41:20PM -0700, Colin Cross wrote:
> figure out how to call clk_set_rate on the single clock that is > exposed to the device, but not propagate it past the device clock if > the device clock doesn't have a divider (propagating it up to an > active pll feeding other devices results in disaster, at least on
This is usually a function of how shared the thing being changed is rather than the specific implementation, though PLLs and FLLs are obviously problematic due to the lock time (if they don't have glitchless handover logic).
> Tegra). This combination doesn't seem to be common in your MX code, > but _every_ Tegra device clock has these three parts.
That's Tegra. Other devices will have other structures.
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