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Subject[PATCH 1/2] Revert "x86, AMD: Fix APIC timer erratum 400 affecting K8 Rev.A-E processors"
From: Borislav Petkov <>

This reverts commit e20a2d205c05cef6b5783df339a7d54adeb50962.

Moving the lower endpoint of the Erratum 400 check to accomodate earlier
K8 revisions (A-E) opens a can of worms which is simply not worth to fix
properly by tweaking the errata checking framework:

* missing IntPenging MSR on revisions < CG cause #GP:

* makes earlier revisions use the LAPIC timer instead of the C1E idle
routine which switches to HPET, thus not waking up in deeper C-states:

Therefore, leave the original boundary starting with K8-revF.
arch/x86/kernel/cpu/amd.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index bb9eb29..3532d3b 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -698,7 +698,7 @@ cpu_dev_register(amd_cpu_dev);

const int amd_erratum_400[] =
- AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0x0f, 0x4, 0x2, 0xff, 0xf),
+ AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf),
AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf));


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