Messages in this thread | | | Date | Wed, 6 Apr 2011 20:16:58 -0400 | From | Don Zickus <> | Subject | Re: [regression 2.6.39-rc2][bisected] "perf, x86: P4 PMU - Read proper MSR register to catch" and NMIs |
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On Wed, Apr 06, 2011 at 05:30:36PM -0500, Shaun Ruffell wrote: > Hello Don, > > I was able to bisect it down to commit 242214f9c1eeaae40, but I'm not > certain where to go from here. Is this something that is already known > or is there more information I should try to collect?
Nope, this is an ongoing issue. What happened was the perf P4 nmi handler was swallowing all the NMIs. My patch fixed that and exposed a double NMI problem. We have been chasing it for a couple of months. I think Cyril was finally able to duplicate it (as he wrote the P4 code). I have confidence that he will find a fix for it soon. :-)
Thanks for the report though!
Cheers, Don
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