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Subject[PATCH 2/4] perf, x86: P4 PMU - Don't forget to clear cpuc->active_mask on overflow
From: Cyrill Gorcunov <>

It's not enough to simply disable event on overflow the cpuc->active_mask
should be cleared as well otherwise counter may stall in "active" even
in real being already disabled (which potentially may lead to the situation
that user may not use this counter further).

Don pointed "I also noticed this patch fixed some unknown NMIs on a P4 when
I stressed the box".

Tested-by: Lin Ming <>
Signed-off-by: Cyrill Gorcunov <>
Acked-by: Don Zickus <>
Signed-off-by: Don Zickus <>
arch/x86/kernel/cpu/perf_event_p4.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 6f2bd89..56ba449 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -946,7 +946,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
if (!x86_perf_event_set_period(event))
if (perf_event_overflow(event, 1, &data, regs))
- p4_pmu_disable_event(event);
+ x86_pmu_stop(event, 0);

if (handled) {

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