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SubjectRe: [PATCH -tip] perf, x86: fix unknown NMIs on a Pentium4 box

* Cyrill Gorcunov <gorcunov@openvz.org> wrote:

> --- linux-2.6.git.orig/arch/x86/kernel/cpu/perf_event.c
> +++ linux-2.6.git/arch/x86/kernel/cpu/perf_event.c
> @@ -1370,9 +1370,16 @@ perf_event_nmi_handler(struct notifier_b
> return NOTIFY_DONE;
> }
>
> - apic_write(APIC_LVTPC, APIC_DM_NMI);
>
> handled = x86_pmu.handle_irq(args->regs);
> +
> + /*
> + * Note the unmasking of LVTPC entry must be
> + * done *after* counter oveflow flag is cleared
> + * otherwise it might lead to double NMIs generation.
> + */
> + apic_write(APIC_LVTPC, APIC_DM_NMI);
> +
> if (!handled)
> return NOTIFY_DONE;
>

This breaks 'perf top' on Intel Nehalem and probably other CPUs. The NMI gets
stuck fast on all CPUs:

NMI: 16 6 3 3 3 3 3 3 3 3 3 3 3 3 4 5 Non-maskable interrupts

Thanks,

Ingo


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