Messages in this thread Patch in this message | | | Date | Mon, 28 Mar 2011 08:36:56 +0200 | From | Ingo Molnar <> | Subject | Re: [PATCH] slub: Disable the lockless allocator |
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* Pekka Enberg <penberg@kernel.org> wrote:
> On Mon, Mar 28, 2011 at 9:19 AM, Ingo Molnar <mingo@elte.hu> wrote: > >> Tejun, does this look good to you as well? I think it should go > >> through the percpu tree. It's needed to fix a boot crash with > >> lockless SLUB fastpaths enabled. > > > > AFAICS Linus applied it already: > > > > d7c3f8cee81f: percpu: Omit segment prefix in the UP case for cmpxchg_double > > Oh, I missed that. Did you test the patch, Ingo? It's missing attributions > and reference to the LKML discussion unfortunately...
I think we might still be missing the hunk below - or is it now not needed anymore?
Thanks,
Ingo
--------------> From 53c0eceb7bf64f2a89c59ae4f14a676fa4128462 Mon Sep 17 00:00:00 2001 From: Christoph Lameter <cl@linux.com> Date: Sat, 26 Mar 2011 14:49:56 -0500 Subject: [PATCH] per_cpu: Fix cmpxchg_double() for !SMP
cmpxchg_double() should only be provided for SMP. In the UP case the GS register is not defined and the function will fail.
Signed-off-by: Christoph Lameter <cl@linux.com> Cc: Pekka Enberg <penberg@kernel.org> Cc: torvalds@linux-foundation.org Cc: tj@kernel.org Cc: npiggin@kernel.dk Cc: rientjes@google.com Cc: linux-mm@kvack.org Cc: Eric Dumazet <eric.dumazet@gmail.com> LKML-Reference: <alpine.DEB.2.00.1103261440160.25375@router.home> Signed-off-by: Ingo Molnar <mingo@elte.hu> --- arch/x86/include/asm/percpu.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h index a09e1f0..52330a4 100644 --- a/arch/x86/include/asm/percpu.h +++ b/arch/x86/include/asm/percpu.h @@ -507,6 +507,7 @@ do { \ * it in software. The address used in the cmpxchg16 instruction must be * aligned to a 16 byte boundary. */ +#ifdef CONFIG_SMP #define percpu_cmpxchg16b_double(pcp1, o1, o2, n1, n2) \ ({ \ char __ret; \ @@ -529,6 +530,7 @@ do { \ #define irqsafe_cpu_cmpxchg_double_8(pcp1, pcp2, o1, o2, n1, n2) percpu_cmpxchg16b_double(pcp1, o1, o2, n1, n2) #endif +#endif /* This is not atomic against other CPUs -- CPU preemption needs to be off */ #define x86_test_and_clear_bit_percpu(bit, var) \
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