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SubjectRe: [PATCH v2 -tip] perf: x86, add SandyBridge support
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On Tue, Mar 1, 2011 at 4:07 PM, Lin Ming <ming.m.lin@intel.com> wrote:
> On Tue, 2011-03-01 at 17:39 +0800, Stephane Eranian wrote:
>> On Tue, Mar 1, 2011 at 9:57 AM, Stephane Eranian <eranian@google.com> wrote:
>> > On Tue, Mar 1, 2011 at 9:45 AM, Lin Ming <ming.m.lin@intel.com> wrote:
>> >> On Tue, 2011-03-01 at 15:43 +0800, Stephane Eranian wrote:
>> >>> On Mon, Feb 28, 2011 at 10:15 AM, Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
>> >>> > On Mon, 2011-02-28 at 15:22 +0800, Lin Ming wrote:
>> >>> >> This patch adds basic SandyBridge support, including hardware cache
>> >>> >> events and PEBS events support.
>> >>> >>
>> >>> >> LLC-* hareware cache events don't work for now, it depends on the
>> >>> >> offcore patches.
>> >>> >
>> >>> > What's the status of those, Stephane reported some problems last I
>> >>> > remember?
>> >>> >
>> >>> I tried the trick I mentioned and it seems to work.
>> >>>
>> >>> Something like below with hwc->extra_alloc.
>> >>> Could probably find a better name for that field.
>> >>
>> >> Stephane,
>> >>
>> >> I'll integrate below changes to the offcore patches, OK?
>> >>
>> > Let me try one more test on this.
>> > I want to show the case the caused the problem in the first place.
>> >
>>
>> There you go:
>>
>> $ task -e offcore_response_0:DMND_DATA_RD:local_dram -e
>> offcore_response_0:DMND_DATA_RD:local_dram noploop 1
>>
>> Here the two instances of offcore_response are in two different event groups.
>> I instrumented get/put percore constraint routines. get1 is where you do the
>> first allocation, get2 is where you do ref++.
>>
>> The scheduling algorithm will do:
>>   - submit 1st group
>>   - schedule 1st group
>>   - submit 2nd group
>>   - schedule 1st + 2nd group
>>
>> Which results in the following trace:
>>
>> [  109.855713] CPU0 get1 cfg=1301b7 ref=1
>> [  109.855717] CPU0 get2 cfg=1301b7 ref=2
>> [  109.855718] CPU0 get2 cfg=1301b7 ref=3 <-- this one is bogus
>> [  109.856606] CPU0 put cfg=1301b7 ref=2
>> [  109.856609] CPU0 put cfg=1301b7 ref=1  <- don't free the resource
>
> Do you mean the issue is still there even with your extra_alloc patch
> applied?
>
No, I am showing you what happens without it.
If you try with it, it should work.

>>
>> [  109.856616] CPU0 get2 cfg=1301b7 ref=2
>> [  109.856619] CPU0 get2 cfg=1301b7 ref=3
>> [  109.856622] CPU0 get2 cfg=1301b7 ref=4
>> [  110.742151] CPU0 put cfg=1301b7 ref=3
>> [  110.742154] CPU0 put cfg=1301b7 ref=2
>>
>> [  110.742160] CPU0 get2 cfg=1301b7 ref=3
>> [  110.742161] CPU0 get2 cfg=1301b7 ref=4
>> [  110.742163] CPU0 get2 cfg=1301b7 ref=5
>> [  110.854448] CPU0 put cfg=1301b7 ref=4
>> [  110.854450] CPU0 put cfg=1301b7 ref=3
>
>
>
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