Messages in this thread | | | Subject | Re: [PATCH -tip] perf: x86, add SandyBridge support | From | Lin Ming <> | Date | Thu, 24 Feb 2011 22:11:24 +0800 |
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On Thu, 2011-02-24 at 22:02 +0800, Andi Kleen wrote: > > + [ C(OP_READ) ] = { > > + [ C(RESULT_ACCESS) ] = 0x04d1, /* MEM_LOAD_UOPS_RETIRED.LLC_HIT */ > > + [ C(RESULT_MISS) ] = 0x0, > > + }, > > + [ C(OP_WRITE) ] = { > > + [ C(RESULT_ACCESS) ] = 0x0424, /* L2_RQSTS.RFO_HITS */ > > + [ C(RESULT_MISS) ] = 0x0824, /* L2_RQSTS.RFO_MISS */ > > No! You really need offcore here. L2 is not LLC!!! > See the offcore patchkit which fixes this for Nehalem.
Yes, I know that. But I write it like this for now since the offcore patchkit has not been merged yet.
> > -Andi
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