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SubjectRe: ARM unaligned MMIO access with attribute((packed))
On Wed, Feb 02, 2011 at 01:38:31PM -0800, David Miller wrote:
> From: Russell King - ARM Linux <>
> Date: Wed, 2 Feb 2011 16:37:02 +0000
> > 1. there's no way to tell GCC that the inline assembly is a load
> > instruction and therefore it needs to schedule the following
> > instructions appropriately.
> Just add a dummy '"m" (pointer)' asm input argument to the inline asm
> statement. Just make sure "typeof(pointer)" has a size matching the
> size of the load your are performing.

That involves this problematical cast from a packed struct pointer to
an unsigned long pointer, which according to the C standard and GCC
folk is undefined.

> > 2. GCC will needlessly reload pointers from structures and other such
> > behaviour because it can't be told clearly what the inline assembly
> > is doing, so the inline asm needs to have a "memory" clobber.
> This behavior is correct, and in fact needed. Writing to chip registers
> can trigger changes to arbitrary main memory locations.

That is really not an argument which stands up to analysis.

When does main memory locations change as a result of a write to a chip
register? The answer is: when DMA is performed - which could be
many microseconds or even milliseconds after you've written the
register, which would be long after you've exited the function doing
the writing.

Not only that, but we have the DMA API to deal with the implications of
that. On ARM, that's a function call, and GCC can't make any assumptions
about memory contents across function calls where it doesn't know what
the function does.

Practice over the last 15 years on ARM has also shown that this is not

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