Messages in this thread | | | Date | Thu, 17 Feb 2011 16:44:55 +0100 (CET) | From | Jiri Kosina <> | Subject | Re: [PATCH 2.6.37 1/4] edac: correct commented info, i82975x |
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On Tue, 25 Jan 2011, Arvind R wrote:
> Subject: [PATCH 2.6.37 1/4] edac: correct commented info > > wrong comments in i82975x driver corrected > > Signed-off-by: Arvind R. <arvino55@gmail.com> > --- > i82975x_edac.c | 10 +++------- > 1 file changed, 3 insertions(+), 7 deletions(-) > --- > diff -up a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c > --- a/drivers/edac/i82975x_edac.c > +++ b/drivers/edac/i82975x_edac.c > @@ -160,8 +160,8 @@ NOTE: Only ONE of the three must be enab > * 3:2 Rank 1 architecture > * 1:0 Rank 0 architecture > * > - * 00 => x16 devices; i.e 4 banks > - * 01 => x8 devices; i.e 8 banks > + * 00 => 4 banks > + * 01 => 8 banks > */ > #define I82975X_C0BNKARC 0x10e > #define I82975X_C1BNKARC 0x18e > @@ -344,11 +344,7 @@ static int dual_channel_active(void __io > static enum dev_type i82975x_dram_type(void __iomem *mch_window, int rank) > { > /* > - * ASUS P5W DH either does not program this register or programs > - * it wrong! > - * ECC is possible on i92975x ONLY with DEV_X8 which should mean 'val' > - * for each rank should be 01b - the LSB of the word should be 0x55; > - * but it reads 0! > + * ECC is possible on i92975x ONLY with DEV_X8 > */ > return DEV_X8; > }
Applied.
-- Jiri Kosina SUSE Labs, Novell Inc.
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