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SubjectRe: [PATCH] drm/i915: Suppress spurious vblank interrupts
On Tue, 1 Feb 2011 10:46:17 -0800
Hugh Dickins <> wrote:

> On Tue, Feb 1, 2011 at 10:08 AM, Jesse Barnes <> wrote:
> > On Tue, 1 Feb 2011 09:46:43 -0800
> > Jesse Barnes <> wrote:
> >>
> >> Are you still seeing underruns during normal activity?
> Yes. That is, I see the "pipe a underrun" messages when I set drm
> debug 7: I'm unaware of any ill-effect from them, unless they are
> indeed a factor in my unflushed text issue.

They can cause your display to shake or flicker, or the memory
controller to get confused enough to hang your system.

> I was surprised that i915_driver_irq_handler "Clear the PIPE(A|B)STAT
> regs" writes back precisely the pipea_stats it reads in, I'd have
> expected to clear something there (and did earlier experiment with
> writing back 0: black screen at boot!). But assumed the protocol is
> such that it acknowledges the status bits by writing same back.

Exactly. High bits are the interrupt enable bits, low bits are set for
status, write of 1 to clear status.

> Right. I haven't double-checked the logic, but I believe it's because
> of bits set in the underrunning pipea_stats. I did one time modify
> the underrun message to print out pipea_stats, over five seconds most
> (265) values were 0x80440207
> (there were also 14 occurrences of 0x80440007, 5 of 0x80440004 and 3
> of 0x80440204).

Well, vblank interrupts are enabled (though they shouldn't be for your
config as far as we know), so the interrupt status and handling is
occurring as expected.

What I find strange is that you're seeing flip pending interrupts. Are
your symptoms affected if you remove the
I915_INTERRUPT_ENABLE_FIX at the top of i915_irq.c?

Do you see any calls to drm_mode_page_flip_ioctl() in your environment?

> I just tried i915.powersave=0 but the underruns still appeared. I
> then tried earlier kernels, and was surprised to find no underruns
> with 2.6.34, 2.6.36: the underruns appeared with 2.6.37.

Ok, that rules out self-refresh then I think.

Jesse Barnes, Intel Open Source Technology Center

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