| Date | Wed, 09 Nov 2011 13:34:28 -0800 | From | Greg KH <> | Subject | [221/264] ASoC: Ensure WM8962 PLL registers are reset |
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3.1-stable review patch. If anyone has any objections, please let me know.
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From: Mark Brown <broonie@opensource.wolfsonmicro.com>
commit 4f4488abc97c1c27ff029f887944e6a6da1f5733 upstream.
The WM8962 has a separate software reset for the PLL registers. Ensure that these are reset also on startup.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
--- sound/soc/codecs/wm8962.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
--- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -1959,7 +1959,13 @@ static int wm8962_readable_register(stru static int wm8962_reset(struct snd_soc_codec *codec) { - return snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243); + int ret; + + ret = snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243); + if (ret != 0) + return ret; + + return snd_soc_write(codec, WM8962_PLL_SOFTWARE_RESET, 0); } static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0);
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